UNIVERSITY OF MADRAS
B.Sc. DEGREE COURSE IN COMPUTER SCIENCE
SEMESTER SYSTEM WITH CREDITS
(Effective from the Academic Year 2003-2004)

Semester I - Practical I - Digital Laboratory

Lecture Lab: 6
Duration: 3 hrs
Maximum Marks: 100
Credits: 4

I: Study of Logic Gates

1. Logic Gates using discrete components.
2. Verification of truth table for AND, OR, NOT, NA.N1J, NOR and XOR gates.
3. Realisation of NOT, AND, OR, EX-OR gates with only NAND gates.
4. Realisation of NOT, AND, OR, EX-OR gates with only NOR gates.

II Implementation of Logic circuits

1.Verfication of Associative law for AND, OR gates.
2.Karnaugh's Map reduction and logic circuit implementation.

III: Adder and Subtractor

1. Verification of Demorgans Law.
2. Implementation of Half- Adder and Half- Subtractor.
3. Implementation of Full-Adder and Full Subtractor.
4.Four bit binary Adder.
5.Four bits binary subtractor using is and 2s complement.

IV : Shift Registers

1. Implementation of Shift Registers. Serial Transfer.
2. Ring Counter.
3. 4 - bit binary counter.
4. BCD counter.
5. Counters for arbitrary sequence.