UNIVERSITY OF MADRAS
B.Sc. DEGREE COURSE IN SOFTWARE ENGINEERING
SEMESTER SYSTEM WITH CREDITS
(Effective from the Academic Year 2003-2004)

SYLLABUS

Semester II - CST 110 - Practical I - Digital Lab

Lecture Per Week: 6 hrs
Duration of Examination: 3 hrs
Maximum Marks: 100
Credits: 4

1. Study of logic gates

a) Logic gates using discrete components
b) Verification of truth table for AND, OR, NOT, NAND, NOR and EXOR gates
c) Realisation of NOT, AND, OR, EX-OR gates with only NAND gates
d) Realisation of NOT, AND, OR, EX-OR gates with only NOR gates

2. Implementation of logic circuits

a) Verification of associative law for AND, OR gates
b) Karnaugh's map reduction and logic circuit implementation

3. Adder and subtractor

a) Verification of Dernorgan's law
b) implementation of half-adder and half-subtractor
c) Implementation of full-adder and full-subtractor
d) Four bit binary adder
e) Four bits binary subtractor using 1s and 2s complement

4. Shift registers

a) Implementation of shift register, serial transfer
b) Ring counter
c) 4-bit binary counter
d) BCD counter
e) Counters for arbitrary sequence