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Set 1 - November 2002
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Testpapers of Jawaharlal Nehru Technological University NR 310201 - Computer Organization - Set 1 - November 2002

Code No-NR- 310201

III-B.Tech. I-Semester Supplementary Examinations, November-2002

COMPUTER ORGANIZATION
Set No. 1
(common to EEE, ECE, EIE and ET)

Time: 3 Hours
Max. Marks: 80

Answer any FIVE questions

All questions carry equal marks

1. (a) Draw the block diagram of Von Neumann computer and explain the significance of the various blocks.

(b) Give the instruction format and information format used in this computer.

2. Write detailed notes on power PC processor clearly specifying the register set, instruction formats and addressing modes used in this processor.

3. Distinguish between hardwired control and micro programmed control unit with the help of a block diagram.

4. It is required to transfer data between cache memory and main memory whenever there is a 'miss' (that is the required data is not available in cache memory). Explain three different mechanisms that will assist data transfer between main memory and cache memory.

5. Explain the direct memory access (DMA) technique of transferring data between main memory and a peripheral device with the help of a suitable block diagram. List out other techniques for doing similar data transfers.

6. What are the various addressing modes used in computer systems? Explain each one of them with a suitable example.

7. (a) What is instruction set?

(b) List out different instructions used in a typical computer system.

(c) Distinguish between processor oriented computer organization and register oriented computer organization.

8. Write short notes on the following topics.

(a) Nanoprogramming (b) CDROM device
(c) DRAM organization (d) Associative memory.

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