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Set 2 - November 2002
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Testpapers of Jawaharlal Nehru Technological University NR 310201 - Computer Organization - Set 2 - November 2002

Code No-NR- 310201

III-B.Tech. I-Semester Supplementary Examinations, November-2002

COMPUTER ORGANIZATION
Set No. 2
(common to EEE, ECE, EIE and ET)

Time: 3 Hours
Max. Marks: 80

Answer any FIVE questions

All questions carry equal marks

1. What is the concept of a Von Neumann computer? Explain its working with the help of a neat block diagram. Show the data paths and the control clearly.

2. Briefly describe the salient aspects of the instruction set and the assembly language of any processor (e.g.8085).

3. Discuss the various schemes for representing fixed and floating numbers stressing the merits and demerits of each scheme.

4. What are the various micro-operations to be performed during the execution of an instruction?

(a) Fetch cycle (b) Indirect cycle
(c) Interrupt cycle (d) Execute cycle.

5. Describe the organization and working of a microprogrammed control unit with the help of a neat block diagram showing the flow of signals.

6. Define the following terms in the context of bus design:

(a) handshaking (b) Lock (c) Master unit (d) Skew (e)Tristate (f) Wait state.

7. Draw the block diagram of a typical DMA controller and explain the significance of each of the elements.

8. Write short notes on any three of the following.

(a) Control unit (b) Memory hierarchy
(c) Interrupt driven I/O (d) I/O processor.

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