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Set 2 - November 2003
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Testpapers of Jawaharlal Nehru Technological University NR 310201 - Computer Organization - Set 2 - November 2003

Code No-NR- 310201

III-B.Tech. I-Semester Supplementary Examinations, November-2003

COMPUTER ORGANIZATION
Set No. 2
(common to EEE, ECE, EIE and ET)

Time: 3 Hours
Max. Marks: 80

Answer any FIVE questions

All questions carry equal marks

1. (a) Give the general structure of a Von Neumann machine and describe the function of each unit.

(b) Describe how an instruction is executed using flow chart in an IAS computer.

2. (a) Describe general branch and call / return instructions.

(b) Explain the Power PC addressing modes.

3. With a neat diagram showing the pin layout of 8085, explain in brief the function of each pin.

4. (a) Clearly explain the following terms

(i) Microprogram
(ii) Microinstruction
(iii) Microprogramming
(iv) Microprogramming language

(b) Draw the diagram of micro architecture control unit and explain.

5. (a) Describe the organization of an associative memory.

(b) Give the internal organization of a typical associative memory cell.

6. (a) What are the advantages of paging?

(b) Explain how logical can be converted into physical address in a paging system?

7. (a) Describe a programmed I/O mode of data transfer and give its disadvantages.

(b) Explain handshaking mode of data transfer using timing diagrams.

8. (a) Describe Interrupt Cycle.

(b) What programming steps are required to check when a source interrupts the computer while it is still being serviced by a previous interrupt request from the same source ?

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