Code No-NR- 310201

III-B.Tech. I-Semester Supplementary Examinations, June-2003

COMPUTER ORGANIZATION
Set No. 4
(common to EEE, ECE, EIE and ET)

Time: 3 Hours
Max. Marks: 80

Answer any FIVE questions

All questions carry equal marks

1. (a) Discuss about the basic instruction cycle with block diagram.

(b) Represent the number (+47.5)₁₀ with a normalized integer mantissa of 13-bit and an exponent of 7 bits as a binary number.

2. (a) Explain the instruction formates for Pentium processor.

(b) Describe the providence for subtraction/addition of floating point numbers.

3. (a) Describe five different ways determining the address of the next micro instruction.

(b) Give the taxonomy of micro instructions.

4. (a) With the help of a diagram, clearly explain the functioning of a microprogrammed control unit.

(b) Microprogrammed unit is slower than hardwired unit. Justify this statement.

5. (a) Clearly explain the following terms:

(i) Control word (ii) Control memory
(iii) Control address register (iv) Control buffer register.

(b) Compare hardwired and micro programmed approaches to control unit design.

6. (a) What do you mean by page fault ?

(b) Explain how number of page faults can be calculated for the given page trace using FIFO page replacement strategy. (Assume 3 frames are available in the memory).

7. (a) Describe an asynchronous data transfer using hand shaking with the help of timing diagram.

(b) Give the block diagram of an I/O with fare and explain its operation.

8. (a) What is vectored and non-vectored interrupt? Explain.

(b) What is priority interrupt? Explain.