Code No-NR- 310201

III-B.Tech. I-Semester Supplementary Examinations, November-2002

COMPUTER ORGANIZATION
Set No. 4
(common to EEE, ECE, EIE and ET)

Time: 3 Hours
Max. Marks: 80

Answer any FIVE questions

All questions carry equal marks

1. (a) Write the major functional units in a general purpose digital computer system with the help of block diagram and clearly explain its functional operation starting from power on.

(b) Define instruction cycle for a CPU. Explain clearly the steps of instruction cycle with a state diagram.

2. (a) Write an assembly program of 8085 to sort the numbers in increasing order given in an array. The count of the numbers in the array is available at the memory location “COUN T”,and the array elements are available from next location.

(b) Explain any four addressing modes of 8085 with suitable example.

3. (a) What is Nano programming?Explain it with a neat diagram. What are its advantages?

(b) Compare hardwired control unit ,micro programmed unit and nano programmed control unit with their merits and demerits.

4. Show how to expand the 256 word 1-bit memory to a 2048 word 1-bit memory using chipselect and 3*8 decoder, Give chip connection diagram.

5. (a) Explain the differences between RISC and CISC processors.

(b) Describe the organization of DMA with the proper initialization of important registers.

6. Explain the concept of cache memory with a neat diagram and the three types of memory mapping techniques used to implement cache memory.

7.(a) Explain, how segmentation scheme is implemented.

(b) Explain the basic cells of SRAM,ROM and DRAM.

8 . Write short notes on any three

(a) Instruction pipeline
(b) Booth's algorithm for multiplication
(c) Pentium Processors
(d) DMA break points.